An event-driven trading simulator that replays historical market data with nanosecond precision, removing OOP overhead to push single-thread performance to the hardware limit.

Motivation
I built Aquila because I wanted to understand exactly how high-frequency, low-latency systems work under the hood. I wanted to see what it takes to strip away overhead, avoid the kernel, and push single-threaded C++ performance to the absolute hardware limit.
The result is a highly optimized pipeline designed to minimize CPU cache misses, kernel involvement, and memory allocation overhead during market data processing.
Built-in Strategies
Core Architecture
To achieve nanosecond precision, the engine completely bypasses standard heap allocations during the hot path by utilizing a custom std::pmr::unsynchronized_pool_resource (EventArena).
Instead of virtual functions which require vtable lookups and prevent inlining, the engine leverages Static Dispatch (CRTP) for strategy classes. Market data is explicitly packed using a Structure of Arrays (SoA) layout rather than AoS, perfectly optimizing it for SIMD vectorization (AVX2) and eliminating CPU cache misses.
Performance Optimizations
__rdtsc with _mm_lfence for micro-benchmarking latency at the 3-nanosecond level.Analytics & Simulation
The execution simulator actively models real-world constraints such as slippage (in basis points) and commission rates. It computes advanced performance metrics including Sharpe Ratio, Sortino Ratio, Max Drawdown (MDD), and Profit Factor.
When a backtest finishes, Aquila instantly exports a report.json. This file can simply be dragged and dropped into the dedicated front-end application to visualize the backtest performance.
The Dashboard
Tech Stack